1. Field of the Invention
The present invention relates to multi chip integrated circuit module assemblies, and more particularly concerns an improved arrangement for mounting and interconnecting a plurality of integrated circuit chips or other components to provide a multi-level interconnection substrate module.
2. Description of Related Art
High density packaging of multiple integrated circuits and other electronic components requires a multi-level substrate so that the very high density of interconnecting circuit traces which are required for interconnecting chips and components with one another may be accomplished at different levels to avoid crossing of conductive leads. Manufacture of such multi-level substrates using conventional thin film techniques has a number of disadvantages. Conventional multi-level substrate processing frequently comprises a sequential process in which one thin film circuit is laid down upon and formed over an earlier formed circuit with suitable dielectric layers to isolate the several thin film circuit layers from one another. Such substrates may employ as many as five or more layers, each of which, excepting only the last, effectively forms a base upon which the next layer is constructed. The multi layer substrate, therefore, can be effectively tested only after completion of all of its layers. This may be expensive because many well made layers of a simple module may have to be discarded if a final layer is found to be faulty, or one may continue to add value to a faulty product.
Conventional thin film processes frequently use processes that have a number of disadvantages. Dimensional precision is difficult to achieve. The use of various etching, stripping and cleaning fluids requires special handling of hazardous chemicals. Techniques for disposal of the resalting effluents are complex and expensive and subject to strict government controls. Etched circuit processing has a relatively low yield, greatly increasing the cost of processing, which inherently involves a large number of costly steps.
Still other problems involve mounting of integrated circuit chips on multi-level circuit substrates, which often is carried out by means of wire bonding, tape automated bonding (TAB) or use of solder balls. These procedures entail difficult, complex and time consuming operations and require relatively large substrate surface areas, which limits density of chip and component packaging. Flip-chip mounting is one method for increasing chip density. In flip-chip mounting of integrated circuit chips a bump or raised feature is formed on the chip pads and the chip is mounted upside down with its bumps electrically contacting its substrate. Although flip-chip mounting is desirable, the acquisition and production of chips with bumps is difficult and expensive. The bumps are generally applied to the chip pads after completion of manufacture of the chips. However, the process of forming bumps on the chip pads may result in unacceptable damage to or destruction of the chips.
Accordingly, it is an object of the present invention to provide for mounting and interconnection of integrated circuit chips or other electrical components by processes and structures that avoid or minimize above mentioned problems.